architecture - CISC machines - don't they just convert complex instructions to RISC?

Perhaps I'm at a misunderstanding in architecture - but if a machine has, say, a multiply instruction - is that instruction not translated to smaller instructions or is so complex such that it ultimately is the same speed as the equivalent RISC instructions?

Multiply is a bad example - it is a single instruction in both architectures. Replace "multiply" in the above with an instruction more complicated in CISC for which RISC has no equivalent that is a single instruction.

Answer

Decoding circuitry of CISC machines are complex and they decode complex CISC instructions to simpler instructions. For example there could be a single CISC instruction to fetch value of two memory address and set result of multiplication to another memory address, in theory. Decoder of CISC machine decodes this single instruction to multiple RISC like operations, like fetching a value from memory location to register, adding another register to that register etc. After decoding there should be no difference. This is how current CISC machines (like x86) competes with RISC machines. But you have to pay price of a complex decoding phase.